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Published 20 hours ago • verified publisher icon openjdk

8295261: RISC-V: Support ReductionV instructions for Vector API

Open zifeihan opened this issue 2 years ago • 4 comments

Currently, certain vector-specific instructions in c2 are not implemented in RISC-V. This patch will add support of AndReductionV, OrReductionV, XorReductionV for RISC-V. This patch was implemented by referring to the sve version of aarch64 and riscv-v-spec v1.0 [1].

For example, AndReductionV is implemented as follows:

diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad
index 0ef36fdb292..c04962993c0 100644
--- a/src/hotspot/cpu/riscv/riscv_v.ad
+++ b/src/hotspot/cpu/riscv/riscv_v.ad
@@ -63,7 +63,6 @@ source %{
       case Op_ExtractS:
       case Op_ExtractUB:
       // Vector API specific
-      case Op_AndReductionV:
       case Op_OrReductionV:
       case Op_XorReductionV:
       case Op_LoadVectorGather:
@@ -785,6 +784,120 @@ instruct vnegD(vReg dst, vReg src) %{
   ins_pipe(pipe_slow);
 %}
 
+// vector and reduction
+
+instruct reduce_andI(iRegINoSp dst, iRegIorL2I src1, vReg src2, vReg tmp) %{
+  predicate(n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_INT);
+  match(Set dst (AndReductionV src1 src2));
+  effect(TEMP tmp);
+  ins_cost(VEC_COST);
+  format %{ "vmv.s.x $tmp, $src1\t#@reduce_andI\n\t"
+            "vredand.vs $tmp, $src2, $tmp\n\t"
+            "vmv.x.s  $dst, $tmp" %}
+  ins_encode %{
+    __ vsetvli(t0, x0, Assembler::e32);
+    __ vmv_s_x(as_VectorRegister($tmp$$reg), $src1$$Register);
+    __ vredand_vs(as_VectorRegister($tmp$$reg), as_VectorRegister($src2$$reg),
+                  as_VectorRegister($tmp$$reg));
+    __ vmv_x_s($dst$$Register, as_VectorRegister($tmp$$reg));
+  %}
+  ins_pipe(pipe_slow);
+%}
+
+instruct reduce_andL(iRegLNoSp dst, iRegL src1, vReg src2, vReg tmp) %{
+  predicate(n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_LONG);
+  match(Set dst (AndReductionV src1 src2));
+  effect(TEMP tmp);
+  ins_cost(VEC_COST);
+  format %{ "vmv.s.x $tmp, $src1\t#@reduce_andL\n\t"
+            "vredand.vs $tmp, $src2, $tmp\n\t"
+            "vmv.x.s  $dst, $tmp" %}
+  ins_encode %{
+    __ vsetvli(t0, x0, Assembler::e64);
+    __ vmv_s_x(as_VectorRegister($tmp$$reg), $src1$$Register);
+    __ vredand_vs(as_VectorRegister($tmp$$reg), as_VectorRegister($src2$$reg),
+                  as_VectorRegister($tmp$$reg));
+    __ vmv_x_s($dst$$Register, as_VectorRegister($tmp$$reg));
+  %}

After this patch, Vector API can use RVV with the -XX:+UseRVV parameter when executing java programs on the RISC-V RVV 1.0 platform. Tests [2] and [3] can be used to test the implementation of this node and it passes the tests properly.

By adding the -XX:+PrintAssembly -Xcomp -XX:-TieredCompilation -XX:+LogCompilation -XX:LogFile=compile.log parameter when executing the test case, hsdis is currently unable to decompile rvv's assembly instructions. The relevant OptoAssembly log output in the compilation log is as follows:

2a8     B22: #	out( B14 B23 ) <- in( B21 B31 )  Freq: 32.1131
2a8     lwu  R28, [R9, #8]	# loadNKlass, compressed class ptr, #@loadNKlass
2ac     decode_klass_not_null  R14, R28	#@decodeKlass_not_null
2b8     ld  R30, [R14, #40]	# class, #@loadKlass
2bc     li R7, #-1	# int, #@loadConI
2c0     vmv.s.x V1, R7	#@reduce_andI
	vredand.vs V1, V2, V1
	vmv.x.s  R28, V1
2d0     mv  R7, precise jdk/internal/vm/vector/VectorSupport$ReductionOperation: 0x000000408c4f6220:Constant:exact *	# ptr, #@loadConP
2e8     beq  R30, R7, B14	#@cmpP_branch  P=0.830000 C=-1.000000

There is no hardware implementation of RISC-V RVV 1.0, so the tests are performed on qemu with parameter -cpu rv64,v=true,vlen=256,vext_spec=v1.0. The execution of ANDReduceInt256VectorTests and ANDReduceLong256VectorTests test cases under qemu, with -XX:+UseRVV turned on, can reduce the execution time of this method by about 50.7% compared to the RVV version without this node implemented. After implementing this node, by comparing the influence of the number of C2 assembly instructions before and after the -XX:+UseRVV parameter is enabled, after enabling -XX:+UseRVV, the number of assembly instructions is reduced by about 50% [4]

[1] https://github.com/riscv/riscv-v-spec/blob/v1.0/v-spec.adoc#vector-reduction-operations [2] https://github.com/openjdk/jdk/blob/master/test/jdk/jdk/incubator/vector/Int256VectorTests.java#ANDReduceInt256VectorTests [3] https://github.com/openjdk/jdk/blob/master/test/jdk/jdk/incubator/vector/Long256VectorTests.java#ANDReduceLong256VectorTests [4] https://github.com/zifeihan/vector-api-test-rvv/blob/master/vector-api-rvv-performance.md

Testing:

  • hotspot and jdk tier1 on unmatched board without new failures
  • test/jdk/jdk/incubator/vector/Int256VectorTests.java with fastdebug on qemu
  • test/jdk/jdk/incubator/vector/Long256VectorTests.java with fastdebug on qemu

Progress

  • [ ] Change must be properly reviewed (1 review required, with at least 1 Reviewer)
  • [x] Change must not contain extraneous whitespace
  • [x] Commit message must refer to an issue

Error

 ⚠️ OCA signatory status must be verified

Issue

  • JDK-8295261: RISC-V: Support ReductionV instructions for Vector API

Reviewing

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zifeihan avatar Oct 13 '22 07:10 zifeihan

Hi @zifeihan, welcome to this OpenJDK project and thanks for contributing!

We do not recognize you as Contributor and need to ensure you have signed the Oracle Contributor Agreement (OCA). If you have not signed the OCA, please follow the instructions. Please fill in your GitHub username in the "Username" field of the application. Once you have signed the OCA, please let us know by writing /signed in a comment in this pull request.

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bridgekeeper[bot] avatar Oct 13 '22 07:10 bridgekeeper[bot]

/covered

zifeihan avatar Oct 13 '22 07:10 zifeihan

Thank you! Please allow for a few business days to verify that your employer has signed the OCA. Also, please note that pull requests that are pending an OCA check will not usually be evaluated, so your patience is appreciated!

bridgekeeper[bot] avatar Oct 13 '22 07:10 bridgekeeper[bot]

@zifeihan The following label will be automatically applied to this pull request:

  • hotspot-compiler

When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command.

openjdk[bot] avatar Oct 13 '22 07:10 openjdk[bot]

@robilad You help may be needed here :P

TheShermanTanker avatar Oct 20 '22 12:10 TheShermanTanker

Webrevs

mlbridge[bot] avatar Oct 27 '22 13:10 mlbridge[bot]

@zifeihan This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8295261: RISC-V: Support ReductionV instructions for Vector API

Reviewed-by: yadongwang, dzhang, fyang, eliu

You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed.

At the time when this comment was updated there had been 1 new commit pushed to the master branch:

  • c2f76383895e3d054988a5817de52e7795bf69c2: 8296335: Fix accessibility manual test instruction

Please see this link for an up-to-date comparison between the source branch of this pull request and the master branch. As there are no conflicts, your changes will automatically be rebased on top of these commits when integrating. If you prefer to avoid this automatic rebasing, please check the documentation for the /integrate command for further details.

As you do not have Committer status in this project an existing Committer must agree to sponsor your change. Possible candidates are the reviewers of this PR (@RealFYang, @theRealELiu) but any other Committer may sponsor as well.

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openjdk[bot] avatar Nov 04 '22 09:11 openjdk[bot]

/integrate

zifeihan avatar Nov 07 '22 01:11 zifeihan

@zifeihan Your change (at version a7db305d10e4a5ee943656cedb0e048353bdc66e) is now ready to be sponsored by a Committer.

openjdk[bot] avatar Nov 07 '22 01:11 openjdk[bot]

/sponsor

RealFYang avatar Nov 07 '22 04:11 RealFYang

Going to push as commit 087cedc080963f027306f9d4c4ab737ddf42a5bc. Since your change was applied there have been 2 commits pushed to the master branch:

  • 556377a0583b519ac191675c2b078f1a2efe2f72: 8296270: Memory leak in ClassLoader::setup_bootstrap_search_path_impl
  • c2f76383895e3d054988a5817de52e7795bf69c2: 8296335: Fix accessibility manual test instruction

Your commit was automatically rebased without conflicts.

openjdk[bot] avatar Nov 07 '22 05:11 openjdk[bot]

@RealFYang @zifeihan Pushed as commit 087cedc080963f027306f9d4c4ab737ddf42a5bc.

:bulb: You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

openjdk[bot] avatar Nov 07 '22 05:11 openjdk[bot]