Simulation of ofdm Tx in FPGA

[hyanki]

Hi I am simulation the openwifi fpga code in vivado and need little info about data structure of test vector Stored in tx-intrf.mem file and other two file also. How these stored data is feeded to 64 bit interface of top tx module? I mean 64 bit interface of bram_din port? Regards J S Hyanki