[L0] Phase 2 of Counter-Based Event Implementation

Open winstonzhang-intel opened this issue 1 year ago • 1 comments

LLVM/SYCL test: https://github.com/intel/llvm/pull/15588

Sep 26 '24 18:09 winstonzhang-intel

E2E failures are unrelated:

Testing: 0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90..

Failed Tests (4): SYCL :: ESIMD/ext_math.cpp SYCL :: ESIMD/ext_math_fast.cpp SYCL :: ESIMD/ext_math_ieee_sqrt_div.cpp SYCL :: ESIMD/ext_math_saturate.cpp

These are failing due to:

| --- TESTING ESIMD rsqrt, T=d, N = 32...

| rsqrt test, kind=ESIMD...

| *** ERROR. SYCL exception caught: << The program was built for 1 devices

| Build program log for 'Intel(R) Data Center GPU Max 1100':

| Module <0x2d0cb80>: Unresolved Symbol <_Z17__spirv_ocl_rsqrtDv32_d>

Which is not related to the changes here where modules are unchanged.

Oct 10 '24 20:10 nrspruit