Olof Kindgren
Olof Kindgren
I saw the project idea to upstream the F4PGA fork of Edalize. Great! But I'm a bit confused by the project "Generalization of wrapper scripts for installed F4PGA toolchain and...
Add support for building and simulating picosoc for TinyFPGA-BX with FuseSoC To test this the core libraries must first be available. Create a workspace directory and run fusesoc library add...
A recent change in FuseSoC to better check data types revealed that some Edalize tool options were mistakenly set as strings instead of integers
When FuseSoC fails to satisfy the dependencies of a core it prints a confusing error message, coming directly from the internal solver e.g. raise RuntimeError(msg.format(e.unsat.to_string(pool))) RuntimeError: UNSATISFIABLE: Conflicting requirements: Requirements:...
Started out with the binary ROS2 release, but it seems like the lib/lib64 confusion in Gentoo makes it a bit cumbersome so I thought I'd switch to your overlay instead....
When using multiple top levels, which sometimes is the case for simulations, there is currently no way to tell the EDA tools which toplevel that should use a specific parameter....
This adds a core description file for the booth_multipliers core that exposes targets for linting and for building a GDSII using OpenLANE. All targets are also implemented as Github actions...
The Zephyr Dining Philosophers demo crashes when asserts are enabled. Need to investigate if interrupts are handled correctly on the sw and hw sides. Could be an issue that the...
This adds a core description file for the zipcpu core that exposes targets for linting and for building a GDSII using OpenLANE. All targets are also implemented as Github actions...
This adds a core description file for the usbcorev core that exposes targets for linting and for building a GDSII using OpenLANE. All targets are also implemented as Github actions...