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olofk
Use target name as default toplevel name.
Thanks! Can you also mention this new behavior in the CAPI2 reference documentation at https://fusesoc.readthedocs.io/en/master/ref/capi2.html#target (it's generated from capi2/core.py).
@imphil
It's a rather rare use case IMO, meaning we set a "default" which is rarely correct. In most cases, the target is named synth or sim, and the toplevel will have a very different name.
I think this is very user specific. In my most cases (90 %) the toplevel has the same name as the target.
This default will make it harder for users to see/debug cases where they failed to specify a toplevel, and now will get errors from their synthesis/simulation tool about e.g. the toplevel "sim" not found, something they never really specified. (Yes, there's an INFO Message, but EDA tool users have been trained over the decades to mostly ignore those.)
I agree, I got the same feeling while implementing the change. A better approach would be to use some special sequence to refer to the target name like
toplevel: %target
or
toplevel: %target%
Yet another approach is to resign from this idea at all. Retyping the name for toplevel is not time consuming. Maybe it would be better to not break the orthogonality.
Hmm... I didn't think about targets without toplevels. Maybe it's easiest to drop this idea and go start looking at adding variables to core files, so we can have e.g. toplevel: %target%. I would like to think this over for just a little bit. In any case we want to do this after releasing 1.12, so it won't go in now anyway
This wasn't intended to be closed. It happened when I renamed the default branch. Please reopen if it's still relevant