FPGA-I2C-Minion
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A simple I2C minion in VHDL
This is a simple I2C minion written in VHDL. The minion supports single and repeated reads/writes, as well as quick read/writes (master can switch between read and write commands while also addressing different minions in quick succession without having to write STOP command on the bus). Clock stretching is not implemented, so make sure that data to master is ready upon request.
- Usage The module can be used through the following interface: #+BEGIN_SRC vhdl read_req : out std_logic; data_to_master : in std_logic_vector(7 downto 0); data_valid : out std_logic; data_from_master : out std_logic_vector(7 downto 0)); #+END_SRC When =read_req= is high, the minion fetches the data =data_to_master= in the same clock cycle, so make sure to set the correct data in advance. When =data_valid= becomes high, =data_from_master= provides valid data in the same clock cycle.
The minion ignores all master commands directed at addresses that do not match =MINION_ADDR= generic. The 7 bits of the =MINION_ADDR= are usually given in the most significant bit (MSB) first format on the master side. For example, a 7 bit address "0000011" corresponds to decimal 3 on the minion, is actually a 6 on the master because the LSB is never sent.
- Simulation Two testbenches are provided with the design: one under ideal conditions; and another one with a noisy SCL signal that has short random spikes that flip th SCL at random, for a random duration. To simulate using [[https://github.com/tgingold/ghdl][ghdl]] run: #+begin_src bash $ make #+end_src
The simulation traces can be viewed using [[http://gtkwave.sourceforge.net/][GTKWave]]: #+begin_src bash $ gtkwave sim/I2C_minion_TB_001_ideal.ghw $ gtkwave sim/I2C_minion_TB_002_noisy_scl.ghw #+end_src
The testbenches should also work in ModelSim.
Here is an example of a single write: [[./pics/single-write.png]]
And here, an example of 3 quick writes followed by a quick read. Quick means that the minion address is given only once in the beginning of the first "quick" operation. [[./pics/consecutive-3xwrite-and-read.png]]