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Atari ST Emulator

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I haven't had much time to work on this. I'm just posting this work-in-progress to make it visible.

work-in-progress

I propose that `ucode` takes on the job of running everything around the instructions, and exceptions. The state machine has one state chain for each instruction being executed. A state...

enhancement

In the current implementation of the clocked CPU, the cycles for exceptions go unaccounted for. The reason is probably that an exception occurs in the space between one instruction ending,...

bug

More completely model the IRC/IR/IRD prefetch queue.

The Phalanx Demo F1 screen doesn't work. A short while after it switches to medium resolution, it tries to execute a `000F` instruction. Which is illegal, so the CPU stops....

bug

There are a few black pixels in the BIG Demo main screen. They probably first appeared with the new shifter reload logic.

bug

Something in https://github.com/nocrew/ostis/commit/23e239461dfc26c35e89a74a389b5816385c0ec1 broke medres. It's not reading data properly since then. https://github.com/nocrew/ostis/commit/5aa12aa4190f0fd60e0760d6d044d48bce057157 works fine. This is only an issue with -K

bug

It's tedious to continuously check that all demos keep working when something in the video components change. I plan to rip out the juicy bits from various demos, and put...

enhancement

Hi, If I read the cpu emulation code correctly, divs/divu cycles are calculated simply by adding the worst case cycle count. If that's the case then the following code Jorge...

enhancement

Make it possible to put a breakpoint on the base instruction instead of the explicit opcode (which is essentially the only possible way today, via watchpoints), so that one can...

enhancement