Verilog - Unconnected port causes error

[Blebowski]

Hi,

trying to elaborate some netlists coming from ORFS,

I get errors.

If not all ports of a cell are connected, then NVC throws errors. E.g. for a cell like:

module gf180mcu_fd_sc_mcu9t5v0__inv_20( I, ZN );
input I;
output ZN;

        not MGM_BG_0( ZN, I );

endmodule

being instantiated in a netlist like so:

 gf180mcu_fd_sc_mcu9t5v0__inv_20 clkload0 (.I(clknet_2_1__leaf_clk));

NVC throws error:

** Error: (init): expected 2 port connections for module gf180mcu_fd_sc_mcu9t5v0__inv_20 but found 1
       > 6_final.v:34483
       |
 34483 |  gf180mcu_fd_sc_mcu9t5v0__inv_20 clkload0 (.I(clknet_2_1__leaf_clk));
       |                                  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

If I try to elaborate the same netlist in a commercial tool, I get:

Lint-[TFIPC-L] Too few instance port connections
... gf180/6_final.v, 34483
riscv, "gf180mcu_fd_sc_mcu9t5v0__inv_20 clkload0( .I (clknet_2_1__leaf_clk));"
  The above instance has fewer port connections than the module definition,
  There are 2 port(s) in module "RTL.gf180mcu_fd_sc_mcu9t5v0__inv_20" 
  definition, but only 1 port connect(s) in the instance.
  output port 'ZN' is not connected.

where a "Lint" style message is something between "Info" and "Warning" message.

IMHO NVC should have this message as warning, not an error. Output ports that are unconnected would be "as-if" floating, and input pins would be driven to a default value based on the type of the port.

The data for this can be found in: https://github.com/nickg/nvc/issues/1293