parse some timing checks and all variants of path_declaration.

[Blebowski]

Hi,

I have extended the parsing of Specify blocks to cover all forms of Path delays and sufficient amount of timing checks. With this, I am almost able to parse: https://github.com/IHP-GmbH/IHP-Open-PDK/blob/main/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v