Doesn't work with a makefile that calls other makefiles

[SethGower]

I was hoping this would be able to handle this properly, since I this is how the build system at my job works, but compiledb can't seem to capture the make instances of the subshells/subprocesses when the makefile that it is called on calls make on another directory. Below is an example of what I am talking about

all:
	make -f Makefile -C ./4 all
	make -f Makefile -C ./5 all
	make -f Makefile -C ./6 all
	make -f Makefile -C ./7 all
	make -f Makefile -C ./8 all
clean:
	make -f Makefile -C ./4 clean
	make -f Makefile -C ./5 clean
	make -f Makefile -C ./6 clean
	make -f Makefile -C ./7 clean
	make -f Makefile -C ./8 clean

Each of these subdirectories is just an arbitrary homework assignment for a class I took, and had readily available to test with. This simply generates

[]

It isn't really necessary to include the source code (and I can't, since homework) but this is the compile_commands.json when using bear make

I tried it with compiledb make MAKE='compiledb -o ../compile_commands.json', and updated the Makefile to be

MAKE=make
all:
	$(MAKE) -f Makefile -C ./4 all
	$(MAKE) -f Makefile -C ./5 all
	$(MAKE) -f Makefile -C ./6 all
	$(MAKE) -f Makefile -C ./7 all
	$(MAKE) -f Makefile -C ./8 all
clean:
	$(MAKE) -f Makefile -C ./4 clean
	$(MAKE) -f Makefile -C ./5 clean
	$(MAKE) -f Makefile -C ./6 clean
	$(MAKE) -f Makefile -C ./7 clean
	$(MAKE) -f Makefile -C ./8 clean

and this yielded this.

The latter Makefile is similar to how it does it at my job, but I am even getting errors (some files aren't being intercepted) when using bear bear -o /path/to/compile_commands.json -a make MAKE='bear -o /path/to/compile_commands.json -a', and it is starting to irritate me. If it helps, I am using Texas Instruments' vision_sdk, and the build system really irritates me. If you have any other suggestions, that would be great. I have also tested it, it doesn't work (doesn't add the compiler options to the db) if the makefile that is being called calls another makefile which then calls another one (using the passing in MAKE= method).

[Str1ker17]

Some suggestions to try:

1. Have you tried pipelining, i.e. make | compiledb?
2. You can use a hidden -c or --cmd options to tell compiledb how to build your project, if the compilation command is not a simple make. https://github.com/nickdiego/compiledb/blob/b615d526019c7b809882090ea7eaff85423f2b13/compiledb/commands/make.py#L68 https://github.com/nickdiego/compiledb/blob/b615d526019c7b809882090ea7eaff85423f2b13/compiledb/commands/make.py#L69

[SeanPcWoo]

@SethGower Hi，I meet the same question with u. Do u have any other method to solve it now? this question also cause that My project can not wrok in Clion.