xu_zh
xu_zh
This should work, tested: - on bare metal CoreMark, ItlbMissBubble is 0, since virtual mem is not enabled - on Linux (not full, 7200000 cycle): ``` [PERF ][time= 7188840] SimTop.l_soc.core_with_l2.core.frontend.inner.itlb:...
> [@ngc7331](https://github.com/ngc7331) are you familar with V2.1 code? Is this stimulation legal? I'm not very familiar with it, but I remember it using the TL-C protocol, so I guess `poke...
Close as V3 bpu is re-written