J. Neuschäfer

I can probably reuse the upstream driver for NPCM7xx.

Two parts are required: - [ ] A small SoC-specific driver for the SDHCI controller in WPCM450 - [ ] A generic mmc-mux driver to deal with [multiplexed MMC cards](https://github.com/neuschaefer/wpcm450/wiki/Dell-iDRAC)

With the PECI subsystem [~~on the way to~~](https://lore.kernel.org/lkml/[email protected]/) [merged into](https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=02e2af20f4f9f2aa0c84e9a30a35c02f0fbb7daa) mainline, we can think about adding a PECI driver for WPCM/NPCM SoCs. This should probably be coordinated with the folks...

Adapting the NPCM7xx I2C driver will be useful for reading EEPROMs, and possibly some other purposes. Depends on #8. It's probably best to wait until after the [patch that adds...

It might be good to have a modern U-Boot port to go along with the modern Linux port. - [ ] Flash layout and `aa550450` marker - [ ] Memory...

- [ ] Roadmap - [ ] Installation instructions ... stuff like that

Out-of-bounds read using llvm-mc -show-inst-operands

3

``` $ echo j 0x10 | build/bin/llvm-mc -show-inst-operands -triple riscv ================================================================= ==783==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60800000ab00 at pc 0x00000050eaa5 bp 0x7ffdb86de190 sp 0x7ffdb86de188 READ of size 8 at 0x60800000ab00...

Assembling "j 0x10" fails with "error: instruction requires: ", Mask == 32

2

Hi, I did the following: ``` $ echo 'j 0x10' | build1/bin/llvm-mc -triple riscv :1:1: error: instruction requires: (, 1

An old commit I found while cleaning up repositories

Just to start a discussion here: I think RISC-V support would be interesting. - On RISC-V there's a firmware call interface called the [Supervisor Binary Interface](https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md), implemented by machine mode...