Try to make V overflow

[hunse]

This isn't an issue, but a challenge! Points for anyone who can make compartment voltage overflow on the chip.

Originally, I thought that V was 23 bits + sign. However, limiting V to 23 bits in the emulator leads to different behaviour in emulator and chip, as can be seen here: https://github.com/nengo/nengo-loihi/tree/v-overflow. It appears that V has at least 24 bits + sign, or that somehow the overflow is detected and the neuron spikes as expected.

That being the case, I do not think it's possible to cause V to overflow in a spiking neuron. I believe there is a way to set a compartment to not spike, though I'm not sure if V can grow unchecked beyond Vth.

If anyone can find a way to make V overflow, then we should account for this in the emulator, in a similar manner to how #111 accounts for U overflow.

[hunse]

It's easy to make V underflow! So we should definitely test that. Even with the current test_uv_overflow, if we just take away the vmin or make it really negative, then V should underflow.