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[BUG] ctags not work

Open jiang131072 opened this issue 10 months ago • 0 comments

Describe the bug ctags not work.

Environment (please complete the following information):

  • OS: Windows1 11 22H2 22621.3447
  • VS Code version 1.88.1
  • Extension version 1.13.5
  • using ctags companion, copilot and the extension

Steps to reproduce settings.json:

    "ctags-companion.command": "ctags -R --fields=+nKz -f .vscode/.tags --langmap=Verilog:+.v",

the open a .v file.

Log .vscode/.tags never generated.

2024-04-14 05:29:07.781 [info] [LintManager] [IcarusLinter] Executing IcarusLinter.lint()
2024-04-14 05:29:07.781 [info] [LintManager] [IcarusLinter] iverilog binary path: iverilog
2024-04-14 05:29:07.781 [info] [LintManager] [IcarusLinter] Execute
2024-04-14 05:29:07.781 [info] [LintManager] [IcarusLinter]   command: "iverilog -t null -g2005 -I \"e:\\sources_1\\new\"  \"e:\\proj\\dsd1-1\\dsd1-1.srcs\\sim_1\\new\\tb_adder_4bit_lookahead.v\""
2024-04-14 05:29:07.781 [info] [LintManager] [IcarusLinter]   cwd    : "e:\\proj\\dsd1-1\\dsd1-1.srcs\\sim_1\\new"
2024-04-14 05:29:07.788 [info] [VerilogDocumentSymbolProvider] [VerilogSymbol] Symbols Requested: file:///e%3A/proj/dsd1-1/dsd1-1.srcs/sim_1/new/tb_adder_4bit_lookahead.v
2024-04-14 05:29:07.788 [info] indexing "e:\\proj\\dsd1-1\\dsd1-1.srcs\\sim_1\\new\\tb_adder_4bit_lookahead.v"
2024-04-14 05:29:07.788 [info] executing ctags
2024-04-14 05:29:07.789 [info] building symbols
2024-04-14 05:29:07.789 [error] No output from ctags
2024-04-14 05:29:07.789 [info] [VerilogDocumentSymbolProvider] 0 top-level symbols returned
2024-04-14 05:29:07.857 [info] [LintManager] [IcarusLinter] 1 errors/warnings returned

Expected behavior generate correct symbols

Actual behavior nothing returned.

Additional context https://github.com/mshr-h/vscode-verilog-hdl-support/blob/d24ea956ec3d95fa07d106e9b9015f90c083cd8c/README.md?plain=1#L69

This is removed in https://github.com/gediminasz/ctags-companion/pull/36

jiang131072 avatar Apr 14 '24 05:04 jiang131072