vscode-verilog-hdl-support
vscode-verilog-hdl-support copied to clipboard
Preprocessor support?
I've run into lots of code that uses something like:
https://www.beyond-circuits.com/wordpress/vpp-pl-man-page/
to embed perl into verilog code and generate the eventual .v file. It would be awesome if the user could define 'open' and 'closing' indicators for "this is not verilog" that could be ignored by any of the verilog highlighting that vscode is doing so it doesn't get tripped up. Obviously these sources files won't work with the linter but at least indentation, snippets, etc could still work...hopefully.
if possible could the beginning and end indicators of the perl code be configurable? not all tools use the same "this is not verilog" indicators. :)