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Introduce I/O buffer memory areas
Many I/O tasks require buffers (e.g. DMA, microSD I/O, keyboard FIFO, etc). These can be mapped into the MMIO memory area, but should use a RAM model rather than the current MMIO registers.
Decide whether to use a common RAM (e.g. BRAM) for all I/O areas, or independent RAM areas for each I/O device (the latter would eliminate bus contention, but requires more MUX logic on the CPU memory bus side, and possibly more BRAM blocks).