[stdlib] Change `SIMD.reduce_and()`/`SIMD.reduce_or()` to bitwise operations

[helehex]

changes the behavior of simd reduce_and()/reduce_or() to be bitwise operations.

Theres a few things that are related to this: builtin any()/all() functions constrain simd bool to size=1

[laszlokindrat]

The other two related patches will be available in the next nightly. Could you please rebase after that, and add a changelog entry?

[helehex]

It might also be a good to group/mention them together in the changelog, and explain this is how you check if a simd is truthy now (no more implicit conversion to bool unless size=1), to avoid common bug, etc..

[soraros]

Could you add some test cases for size_out > 1?

[helehex]

@laszlokindrat do you like the new test :]

[helehex]

oh, i think the changelog has too many cols or something

[laszlokindrat]

!sync

[laszlokindrat]

I'm seeing a lot of internal breakages on this, not sure what's going on. Could you please rebase after the next nightly?

[helehex]

Yeah that's ok, I know there was an issue originally where I had to rebind the llvm call result, but that went away for some reason. Or maybe because it returns a SIMD instead of Bool now?

[helehex]

uh oh, test_reversed failed.. it passes locally for me.. hmm.. could this be that stochastic failing of reversed i've been hearing about?

[modularbot]

✅🟣 This contribution has been merged 🟣✅

Your pull request has been merged to the internal upstream Mojo sources. It will be reflected here in the Mojo repository on the nightly branch during the next Mojo nightly release, typically within the next 24-48 hours.

We use Copybara to merge external contributions, click here to learn more.

[modularbot]

Landed in a90b819e30fe3cdee1e2998b018d39802cd27398! Thank you for your contribution 🎉