fmi-standard
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Add RISC-V to architectures
A colleague pointed me to:
- https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+Specifications#Profiles
- https://drive.google.com/file/d/1Kg7Ner5ZlxFDclf92-9Tz88JvmZWt5Wb/view?pli=1 see 3.4 there
- https://drive.google.com/file/d/12QKRm92cLcEk8-5J9NI91m0fAQOxqNAq/view
He seems to favor RV32 and RV64 as architecture/platform handles. Not sure about the upper and lower case conventions and if we want to follow "theirs".
We'll go with the longer names as discussed in the design meeting yesterday (see also https://stackoverflow.com/questions/15036909/how-to-list-supported-target-architectures-in-clang for clang's architecture names).