Tim 'mithro' Ansell
Tim 'mithro' Ansell
Guess we need to move this repo to Github Actions?
Please rebase onto master.
@mateusz-holenko -- Could you work with @PiotrZierhoffer to get something like this pull request merged?
Do you think we could add a Travis target which tests this config?
@mateusz-holenko - It would be great to get this stuff merged. Can you work with @stffrdhrn to make that happen?
@mateusz-holenko @ewenmcneill -- Any idea?
I think an example "debug.py" target with documentation on how to talk to it and use it would be super awesome! Even better if it could have CI run this...
Sounds good to me!
I started trying to make a diagram of of your ascii diagram at https://docs.google.com/drawings/d/13bRFtmgb7Og6hmWEYqxPrfbshxPwuIRDJ0NzPKeBoZs/edit Google DocsLiteX Wishbone Bridge InfrastructurePeripheral Bridge WB2CSR Wishbone CSR FPGA Bridge Host Computer LiteScope litex_crossover_uart client...
Why not both!? :-P 