Support of modern RISC-V architecture
RISC-V architecture is a game-changer for the microprocessor ecosystem.
More than a risk, it would be a huge mistake to ignore it and miss the revolution underway from sensors to HPC without forgetting dis-aggregated architectures, AI, DPU, ...
Thanks for your feedbacks. We are definitely keeping a eye at RISC-V. For now, we are focusing on x86_64 and arm64
« Keeping an eye », please wake up !!!
Can you please also don't close a ticket not yet implemented?
This ticket is really worth to be included into Azure Linux roadmap.
I ping @suhuruli and @oaljoundi about this.
Thanks
@ohault, this is a good item and we can add it to our roadmap.