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Support of modern RISC-V architecture

Open ohault opened this issue 2 years ago • 3 comments

RISC-V architecture is a game-changer for the microprocessor ecosystem.

More than a risk, it would be a huge mistake to ignore it and miss the revolution underway from sensors to HPC without forgetting dis-aggregated architectures, AI, DPU, ...

ohault avatar Dec 07 '23 07:12 ohault

Thanks for your feedbacks. We are definitely keeping a eye at RISC-V. For now, we are focusing on x86_64 and arm64

eric-desrochers avatar Apr 26 '24 14:04 eric-desrochers

« Keeping an eye », please wake up !!!

Can you please also don't close a ticket not yet implemented?

This ticket is really worth to be included into Azure Linux roadmap.

I ping @suhuruli and @oaljoundi about this.

Thanks

ohault avatar Apr 26 '24 15:04 ohault

@ohault, this is a good item and we can add it to our roadmap.

suhuruli avatar May 01 '24 18:05 suhuruli