x64: Improve register allocator

[merryhime]

• [ ] Track zexts, Track setbits.
• [ ] Improve xmm → gpr transfers. (This code looks suboptimal.)

[Wunkolo]

AVX512 doubles the amount of SIMD registers but requires instructions to emit in EVEX form.

It might be worth detecting when AVX512{F,VL} is available and having an alternative UseScratchXmmEVEX function of some sort that allows access to these upper SIMD registers since right now I just hard-code their usage.

https://github.com/merryhime/dynarmic/blob/da5d06c32ac0b9cb257dda22e5a1ac9a55ee92c2/src/dynarmic/backend/x64/emit_x64_vector.cpp#L571-L572

[Wunkolo]

Actually a better idea with likely larger gains is maybe even just keeping the allocator as it is and using those new registers as extra spill-space.

[Wunkolo]

Upper AVX512 xmm16-31-registers as spill-space is being addressed in #748