dynarmic
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decoder/arm: Make CLZ required encoding bits more relaxed
The official document marks these now ignored bits (using brackets) as should be there, but not necessary. I was encountering a JIT generate this instruction running fine on a real CPU.

Note to self: Bits 8-11 and 16-19 are SBO.
TODO: This breaks tests because unicorn doesn't recognise these encodings.
This also applies to QADD, QSUB, QDADD, QDSUB, I will keep it to myself for now (encountered it, though I don't want to complicate things).
I think It would be better if I modify this in a fork for my need. Dynarmic should stick to normal standard, and I think trying to get the tests to pass maybe a hassle too!