Kristof Roomp
Kristof Roomp
This is implemented now, can close the issue
This is fixed now and the build verification now includes MIPS bigendian
Looks like NonZeroU32::unsigned_abs was stabilized in 1.64... let's see if there's a workaround
Rebased since this change had sat there for a while
There's still a CI test_toolchain with 1.63 that needs to be upgraded before this can be integrated
aarch64 neon support is now in version 0.7.7
Do you think it would be cleaner to use the i32 versions of these since the implementation is identical, avoid code duplication ie: ``` #[inline] #[must_use] pub fn move_mask(self) ->...
These are a bit tricky since the SIMD shifts don't behave like wrapping shifts. For example, SIMD shift of a 1u32
Isn't that just u8x16::max?
What stable intrinsics would this translate to? Sadly most of the < 32 bit shuffle intrinsics are kind of special case