Martin Maas

I think it should be the same behavior as if it was a load or store – i.e., usually the PMM settings for the current privilege mode, or the effective...

In consultation with the Architecture Review Committee, a decision was reached that these instructions should not apply pointer masking altogether. The rationale is as follows: Applying pointer masking to SFENCE.*...

The reason for this exception is that pointer masking does not apply to instructions. The equivalent for hypervisor load/store instructions is described in Section 2.6: Pointer masking applies to HLV.*...

Ah, thanks for clarifying – I had misunderstood the question. I agree that we should define the behavior in both of these cases. We'll probably need to bring this to...

After consulting with the Architecture Review Committee, we settled on the following language: > When MXR is in effect at the effective privilege mode where explicit memory access is performed,...

https://github.com/riscv/riscv-j-extension/blob/master/zjpm-spec.pdf