Manuel Bl.

Results 190 comments of Manuel Bl.

I can test it on several STM32s with DWC cores 0x1200 and 0x2000. (Your STM32F722 has a core ID 0x3000.) Give me about 3 days for it. At first sight,...

@TobleMiner I just wanted to test it on a Nucelo-F722ZE before moving on to the other boards. However, *libopencme* has no USB support for F7 boards. It's missing in the...

I have found that the PRs already in the pipeline also work for the STM32F7: #1256 Disable VBUS sensing #1258 Fix usb_dwc_common.c endpoint initialization #1259 Fix usb_dwc_common.c late IN usb...

@dmitrystu: Regarding the "not real" double buffered functionality... Is this a limitation of the OTGFS USB core? Is it because it is not possible to put additional data into the...

Are you sure your analysis it correct? It contradicts my understanding of how USB and USB peripherals in MCUs work. The USB peripheral handles all USB communication. Any code -...

@karlp I don't agree. On STM32F1s, the ACKs/NAKs are tied to whether buffers are free or not. Whenever the USB peripheral has received a packet, *RX_STAT* automatically changes. All further...

Yes, but still no problem. The first packet is read, clearing NAK and starting the flash erase. A second packet is normally received by the USB peripheral and put into...

The STM32 F3 series uses two different memory organizations for USB buffers. For this series, *libopencm3* only supports one of them, and it's not the one used in your MCU....

@BraveUlysses81 I've just checked that the latest Raspberry Stretch Lite image still contains a *cmdline.txt* file. You can edit it on a different computer before you boot the Raspberry Pi...

Do I understand it correctly that you are running the LoRa gateway within a **Docker** container? If so, I can't help you as I'm not familiar with how serial ports...