migen
migen copied to clipboard
m-labs
A Python toolbox for building complex digital hardware
https://irclog.whitequark.org/m-labs/2017-06-09#1496995548-1497020136; https://github.com/m-labs/migen/blob/master/migen/sim/core.py#L308
I'd like to be able to translate the migen Module hierarchy into the exported HDL hierarchy at least to some extent. * This would allow estimating resource usage at some...
Added this issue, since I didn't find it in the bug tracker. Is there a workaround for this?
Vivado flags a bunch of "unknown" (~80 from dac_refclk to each jesd phy_tx_clk and 16 from dac_refclk to sys_clk) and "unsafe" (1-3 on each clock domain, presumably comb logic in...
* Moved "first word fall through" `fwft` to be part of _FIFOInterface. * Added documentation what the hell `fwft` stands for. * Checks the compatibility of the `fwft` argument given...
Sometimes, when declaring a large memory with async_read=True, it gets placed in BRAM anyway. Most notably, when instantiating a large SyncFIFO. This is because the read address comes directly from...
Being able to install migen through PyPi would be a useful for stable configurations. It would also increase the exposure of migen to more of the Python community.
The following migen.genlib modules already have inline documentation! - coding - Good! - sort - Good! The following migen.genlib modules are missing docstrings or other form of inline documentation; -...
What is the reason for it? Maybe it could at least have a default value?
In your documentation I've seen you import in these 2 ways: ```python >>> from migen.fhdl.std import * or >>> from migen.fhdl import * ``` However, when I try to do...
