Luo Jia / Zhouqi Jiang

@burrbull: I discovered this note on [descriptions of dimArrayIndex](https://www.keil.com/pack/doc/CMSIS/SVD/html/elem_special.html#elem_dimArrayIndex): > User is responsible for uniqueness across description. Will this help to solve our issue here?

Atomic modify operation is verified in this HAL crate: [gpio.rs file](https://github.com/gd32v-rust/gd32vf103-hal/blob/11a01fb2d3182bf8974d689c075d996b1552a23a/src/gpio.rs#L180-L211). I believe we can refer to this pull request: https://github.com/rust-embedded/svd2rust/pull/407 We may always perform atomic operations on chips, which...

Will this be achieveable on platforms other than ARM? We may wish to execute embassy on more achitectures.

https://github.com/rust-embedded/embedded-hal/issues/30#issuecomment-557439768 https://github.com/rust-embedded/embedded-hal/issues/30#issuecomment-557921314 Should the width be an associated type parameter in trait other than in generic type bound? That could be a more reasonable design as typically the chip only...

Should this trait be: ```rust pub trait OutputPort { type Error; fn output(&mut self, word: Width) -> Result; } ``` or ```rust pub trait OutputPort { type Error; type Width;...

Maybe we should get a reference design of this feature; that could be built into stm32f30x-hal crate or somewhere else. For example, when I split a pac::GPIOA port we get...

It says `can't link soft-float modules with double-float modules`, what could this 'double-float module' be? There's no float and double extension in rust's `riscv32imac` target.

Ref: https://github.com/riscv/rvv-intrinsic-doc

We should figure out a way to handle LLVM's `vscale` in Rust, which Rust team should we consult with on this issue?

It says: ``` the feature `aarch64_target_feature` has been stable since 1.61.0 and no longer requires an attribute to enable ``` Should I remove these stable feature gates as well?