make run-simple-system failure

[ekigwana]

Observed Behavior

make run-simple-system fails to compile simple program

ibex/examples/sw/simple_system/common/simple_system_common.c:40: Error: unrecognized opcode csrw minstret,x0', extension zicsr' required

Expected Behavior

make run-simple-system compiles simple program

Steps to reproduce the issue

Setup virtual environment

1. python -m venv ~/.ibex-eda/
2. . ~/.ibex-eda/bin/activate
3. pip install mako
4. pip install packaging

build system

1. . ~/.ibex-eda/bin/activate
2. git clone https://github.com/olofk/edalize.git
3. cd edalize
4. pip install .
5. cd ..
6. git clone https://github.com/lowRISC/fusesoc.git
7. cd fusesoc
8. pip install .
9. cd ..
10. git clone https://github.com/lowRISC/ibex.git
11. ./util/ibex_config.py small fusesoc_opts

--RV32E=0 --RV32M=ibex_pkg::RV32MFast --RV32B=ibex_pkg::RV32BNone --RegFile=ibex_pkg::RegFileFF --BranchTargetALU=0 --WritebackStage=0 --ICache=0 --ICacheECC=0 --ICacheScramble=0 --BranchPredictor=0 --DbgTriggerEn=0 --SecureIbex=0 --PMPEnable=0 --PMPGranularity=0 --PMPNumRegions=4 --MHPMCounterNum=0 --MHPMCounterWidth=40

13. ./util/check_tool_requirements.py INFO: Tool verilator present: Sufficiently recent version (found 5.028; needed 4.210) INFO: Tool edalize present: Sufficiently recent version (found 0.6.2.dev2+g1eedb7f; needed 0.2.0)

14. make build-simple-system

15. make run-simple-system

As a quick aside having the above steps would be helpful in the documentation.

No modifications to any sources. No parameters set.

My Environment

Nothing special riscv32-unknown-elf-gcc: gcc version 15.1.0 (Gentoo 15.1.0 p55)

Using Ibex as a micro controller in an FPGA

EDA tool and version: Xilinx Vivado 2025.1

Operating system: Gentoo

Version of the Ibex source code: git master db07ab174e336d6feb82c96249539badd19f0d6c

no modifications to source

[SamuelRiedel]

Thanks for bringing this up. I'll just add some context to this until we update the compiler and make the new march string the default everywhere.

The reason for this is a breaking change in the RISC-V specification, which became the default behavior in GCC 12. Instructions from the Zicsr and Zifencei extensions, which were previously part of the base ISA, now need to be specified explicitly. This issue (https://github.com/lowRISC/ibex/pull/2326) is surfacing more often because, while this specification change happened years ago, Ibex by default still uses GCC 10.

In a quick test I did, it seems GCC 10 already accepts the Zicsr flag but doesn't require it. However, the Zifencei flag is not yet recognized in this version of GCC. While we could add the Zicsr flag already, we must then remember to enable the Zifencei flag once we update the compiler. For example, with GCC 15, using rv32imc_zicsr alone will be insufficient, as the instruction-fetch fence instruction (from Zifencei) will not be recognized.

Finally, https://github.com/lowRISC/ibex/pull/2289 addresses the updated march string in the simple system examples. Once we update the compiler, we will also need to update the march string in other places, such as the DV infrastructure.