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Published 20 hours ago • verified publisher icon lowRISC

mismatch between spike sim and rtl sim

Open hyperion009 opened this issue 2 years ago • 2 comments

Hi I used the RTL code of ibex-pulpissimo-v6.1.1 and kicked off the following test case: make TEST=riscv_arithmetic_basic_test ISS=spike ISA=rv32imc SEED=123 log: 1669889903408 out/seed-123/regr.log： 1669888493790 Could you give me any suggestions? how to debug it. BTW, I replaced the "spike_log_to_trace_csv.py" by one in the master version of riscv-dv. Because the original one is fail to convert log into csv : 1669888920139

hyperion009 avatar Dec 01 '22 10:12 hyperion009

Are you referring to the https://github.com/lowRISC/ibex/tree/pulpissimo branch? The co-simulation system is only supported on the master branch.

GregAC avatar Dec 06 '22 19:12 GregAC

No. I didn't enable the co-simulation option. just a regular simulation with the offline check. actually, I had a try on both the master and pulpissimo branches, and got the same issue. here is my used version: toolchain: https://github.com/lowRISC/lowrisc-toolchains/releases/download/20220524-1/lowrisc-toolchain-rv32imcb-20220524-1.tar.xz tree: https://github.com/lowRISC/ibex/releases/tag/pulpissimo-v6.1.1 spike: https://github.com/lowRISC/riscv-isa-sim/releases/tag/ibex-cosim-v0.3

hyperion009 avatar Dec 08 '22 02:12 hyperion009