Remove restrictions in analysis SDC writer

[tangxifan]

Describe the bug As OpenFPGA now supports multi-clock FPGAs, the analysis SDC writer still supports only single-clock devices. The restrictions have to be removed.

To Reproduce Codes with assertations:

https://github.com/lnis-uofu/OpenFPGA/blob/a1aade5d018a1d3d17ef71d61cc674ef61aa19db/openfpga/src/fpga_sdc/analysis_sdc_writer.cpp#L85-L88

Expected behavior Analysis SDC writer should work for multi-clock FPGAs.

[Nakiana]

@tangxifan Could you tell me when to solve the problem?

[tangxifan]

@Nakiana I do not have a specific timeline on this issue yet. I may fixed this through a big upgrades on the current SDC writer, as it is missing many features (check the issue list)

[Nakiana]

@tangxifan Ok, looking forward to your update.