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Circuit IR Compilers and Tools
Adding `fopen` and `fclose` allows `fwrite` to real files instead of just standard streams. According to SV spec 21.3.1, the return value `fd` of `fopen` is an `integer`. The CIRCT...
This PR depends on #7104 . LTLToCore now folds the disable signals into their associated properties and yields clocked_assertlike ops instead of sv.assert. This follows the effort to get rid...
BindOp refers an instance through an inner symbol and `BindOp::verifySymbolUses>findInstanceSymbolInBlock` looks up an instance by walking entire modules in the worst case. It hasn't cause any issue probably because bind...
This fixes an overflow in walkDrivers when field ID is zero. Fix https://github.com/chipsalliance/chisel/issues/4354 and https://github.com/llvm/circt/issues/7423.
[Seq] Introduce seq.initial, !seq.immutable and replace powerOn value with initial value in compreg
This PR extends compreg's powerOnValue operand to be able to capture more complicated initialization such as firreg's randomized initialization or DPI calls. This change should make register initialization more modular...
Following #7480, This PR adds support for initialization of arcilator memories. The code still needs tidying and testing. But, as always, I appreciate early feedback on the overall approach. Specifically,...
`circt-opt -canonicalize` triggers an assertion on the following input. Maybe an upstream bug? `Assertion failed: (mayBeGraphRegion(*op->getParentRegion()) && "expected that op has no uses"), function operator(), file PatternMatch.cpp, line 182.` ```...
* Verify specified symbols resolve for extmodule * Verify specified symbols resolve to LayerOp's * Verify public modules don't enable circuit-disabled layers. (SpecializeLayers will delete if so)
Standard LLVM version update.