circt
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llvm
Circuit IR Compilers and Tools
In order to support partial lowerings involving the FIRRTL dialect, and to mix in foreign operations and types, we need a way to pass foreign types through FIRRTL modules, instances,...
Currently, the code for parsing/printing HW parameter lists is duplicated between the [MSFT dialect](https://github.com/llvm/circt/blob/f1ed562e0e2e3b36ecca51e1d38d069e6836962d/lib/Dialect/MSFT/MSFTOps.cpp#L549) and the [HW dialect](https://github.com/llvm/circt/blob/d8a8bf1296dbc5e740ba2a5e8e265038c49b195d/lib/Dialect/HW/HWOps.cpp#L763). Soon, the [Calyx dialect](https://github.com/llvm/circt/pull/3565) will also need to parse/print HW parameter lists,...
I don't know much about SMT, but I had a chat with @amaleewilson who does, and the conclusion was that it would be interesting to explore formulating the CIRCT scheduling...
Now that the SSP dialect is starting to land, one potentially enhancement is to import/export CIRCT scheduling problems into and out of well-defined solver formats. For example, SAT problems have...
As discussed in the ODM on 5/18/22. The idea is to transform ```mlir hw.module @foo(%in: !hw.struct) -> (out: !hw.struct) { %0 = hw.struct_extract %in["a"] : !hw.struct %1 = hw.struct_extract %in["b"]...
Running the following test with `firtool test.fir`: ``` circuit Top: extmodule Other: input a: UInt module Top: inst x of Other inst y of Other y.a
Lowering Calyx without having to rely on the native compiler seems to be one of the [top requirements](https://github.com/cucapra/calyx/discussions/804) for folks wanting to use Calyx within CIRCT. This tracks the main...
#3595 introduced FSM materialization for the Calyx control program. In this, an FSM was materialized with top-level I/O corresponding to the `go, done` ports of the `compiledGroups` within the control...
Requires generating python headers for pybind11. MLIR seems to do this (or my editor has some other way of discovering).
In 5592ee2471aa57661ac76336d60b872ed06a70e5 support for `llhd.sig` inside `llhd.proc` was added. However, in `LLHDToLLVM` signals declared inside procs are never initialized. For entities this happens [here](https://github.com/llvm/circt/blob/main/lib/Conversion/LLHDToLLVM/LLHDToLLVM.cpp#L1168-L1290). As a result, the simulator crashes...
