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Published 20 hours ago • verified publisher icon llvm

[SV] Add option to generate ram blocks without x assigns

Open hutch31 opened this issue 7 months ago • 1 comments

Generated ram blocks have an output assignment which assigns the read port value to X when read is not enabled. This can cause problems with some design flows or tools.

Add option to force output to a constant address or value when read is not enabled.

hutch31 avatar Jul 04 '24 12:07 hutch31