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[Verif] Add clocked Assert Assume Cover ops
This PR is in response to #6982 and adds clocked versions of assert, assume, cover. What still needs to be done:
- [x] Update ExportVerilog
- [x] Add Verifier that checks that we have exactly one disable and clock.
- [x] Add tests
@uenoku @fabianschuiki I moved the verification into a dedicated pass, now the question is: when should this pass be called? Just before emission? At the end of the hw pass pipeline?
when should this pass be called? Just before emission? At the end of the hw pass pipeline?
I would run this pass at least just before ExportVerilog, or before any pass that wants to rely on the invariant that clocked asserts contain no ltl.clock ops in the property/sequence that they're checking.