rellic
rellic copied to clipboard
Lifting this bitcode results in an empty function
The enable_pin function is non-empty in the bitcode, but empty in the decompiled source.
; ModuleID = '/tmp/challenge-3/program_c/src/gpio.ll'
source_filename = "gpio.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu-elf"
%struct.pin_type = type { i32, i32, i32, i32, i32 }
%enable_pin.frame_type_part0 = type <{ [48 x i8] }>
@pinOL = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinIL = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinIR = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinOR = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@__anvill_reg_RBP = external local_unnamed_addr global i64
@__anvill_sp = external global i8
@__anvill_ra = external global i8
@__anvill_pc = external global i8
@llvm.compiler.used = appending global [15 x i8*] [i8* bitcast (void (i32)* @disable_pin to i8*), i8* bitcast (void (i32)* @enable_pin to i8*), i8* bitcast (void (i32, i8*)* @get_duty to i8*), i8* bitcast (void (i32, i8*)* @get_period to i8*), i8* bitcast (%struct.pin_type* (%struct.pin_type*, i32)* @get_pin to i8*), i8* bitcast (void ()* @initialize_pins to i8*), i8* bitcast (i64 (i32, i64, i32)* @lseek to i8*), i8* bitcast (i32 (i8*, i32, ...)* @open to i8*), i8* bitcast (void (i32)* @polarity_normal to i8*), i8* bitcast (i64 (i32, i8*, i64)* @read to i8*), i8* bitcast (void (i32, i32)* @set_duty to i8*), i8* bitcast (void (i32, i8*, i8)* @set_period to i8*), i8* bitcast (void (i32, i32)* @set_power to i8*), i8* bitcast (void (i32)* @set_state to i8*), i8* bitcast (i64 (i32, i8*, i64)* @write to i8*)], section "llvm.metadata"
@__anvill_stack_minus_48 = global i8 0
@__anvill_stack_minus_47 = global i8 0
@__anvill_stack_minus_46 = global i8 0
@__anvill_stack_minus_45 = global i8 0
@__anvill_stack_minus_44 = global i8 0
@__anvill_stack_minus_43 = global i8 0
@__anvill_stack_minus_42 = global i8 0
@__anvill_stack_minus_41 = global i8 0
@__anvill_stack_minus_40 = global i8 0
@__anvill_stack_minus_39 = global i8 0
@__anvill_stack_minus_38 = global i8 0
@__anvill_stack_minus_37 = global i8 0
@__anvill_stack_minus_36 = global i8 0
@__anvill_stack_minus_35 = global i8 0
@__anvill_stack_minus_34 = global i8 0
@__anvill_stack_minus_33 = global i8 0
@__anvill_stack_minus_32 = global i8 0
@__anvill_stack_minus_31 = global i8 0
@__anvill_stack_minus_30 = global i8 0
@__anvill_stack_minus_29 = global i8 0
@__anvill_stack_minus_28 = global i8 0
@__anvill_stack_minus_27 = global i8 0
@__anvill_stack_minus_26 = global i8 0
@__anvill_stack_minus_25 = global i8 0
@__anvill_stack_minus_24 = global i8 0
@__anvill_stack_minus_23 = global i8 0
@__anvill_stack_minus_22 = global i8 0
@__anvill_stack_minus_21 = global i8 0
@__anvill_stack_minus_20 = global i8 0
@__anvill_stack_minus_19 = global i8 0
@__anvill_stack_minus_18 = global i8 0
@__anvill_stack_minus_17 = global i8 0
@__anvill_stack_minus_16 = global i8 0
@__anvill_stack_minus_15 = global i8 0
@__anvill_stack_minus_14 = global i8 0
@__anvill_stack_minus_13 = global i8 0
@__anvill_stack_minus_12 = global i8 0
@__anvill_stack_minus_11 = global i8 0
@__anvill_stack_minus_10 = global i8 0
@__anvill_stack_minus_9 = global i8 0
@__anvill_stack_minus_8 = global i8 0
@__anvill_stack_minus_7 = global i8 0
@__anvill_stack_minus_6 = global i8 0
@__anvill_stack_minus_5 = global i8 0
@__anvill_stack_minus_4 = global i8 0
@__anvill_stack_minus_3 = global i8 0
@__anvill_stack_minus_2 = global i8 0
@__anvill_stack_minus_1 = global i8 0
@__anvill_stack_0 = global i8 0
@__anvill_stack_plus_1 = global i8 0
@__anvill_stack_plus_2 = global i8 0
@__anvill_stack_plus_3 = global i8 0
@__anvill_stack_plus_4 = global i8 0
@__anvill_stack_plus_5 = global i8 0
@__anvill_stack_plus_6 = global i8 0
@__anvill_stack_plus_7 = global i8 0
; Function Attrs: noinline
declare x86_64_sysvcc void @initialize_pins() #0
; Function Attrs: noinline
declare x86_64_sysvcc i32 @open(i8*, i32, ...) #0
; Function Attrs: noinline
declare x86_64_sysvcc %struct.pin_type* @get_pin(%struct.pin_type*, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_power(i32, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @lseek(i32, i64, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @write(i32, i8*, i64) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_state(i32) #0
; Function Attrs: noinline
define x86_64_sysvcc void @enable_pin(i32 %0) #0 {
%2 = alloca %enable_pin.frame_type_part0, align 8
%3 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 0
%4 = load i8, i8* @__anvill_stack_minus_48, align 1
store i8 %4, i8* %3, align 8
%5 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 1
%6 = load i8, i8* @__anvill_stack_minus_47, align 1
store i8 %6, i8* %5, align 1
%7 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 2
%8 = load i8, i8* @__anvill_stack_minus_46, align 1
store i8 %8, i8* %7, align 2
%9 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 3
%10 = load i8, i8* @__anvill_stack_minus_45, align 1
store i8 %10, i8* %9, align 1
%11 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 8
%12 = load i8, i8* @__anvill_stack_minus_40, align 1
store i8 %12, i8* %11, align 8
%13 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 9
%14 = load i8, i8* @__anvill_stack_minus_39, align 1
store i8 %14, i8* %13, align 1
%15 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 10
%16 = load i8, i8* @__anvill_stack_minus_38, align 1
store i8 %16, i8* %15, align 2
%17 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 11
%18 = load i8, i8* @__anvill_stack_minus_37, align 1
store i8 %18, i8* %17, align 1
%19 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 12
%20 = load i8, i8* @__anvill_stack_minus_36, align 1
store i8 %20, i8* %19, align 4
%21 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 13
%22 = load i8, i8* @__anvill_stack_minus_35, align 1
store i8 %22, i8* %21, align 1
%23 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 14
%24 = load i8, i8* @__anvill_stack_minus_34, align 1
store i8 %24, i8* %23, align 2
%25 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 15
%26 = load i8, i8* @__anvill_stack_minus_33, align 1
store i8 %26, i8* %25, align 1
%27 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 16
%28 = load i8, i8* @__anvill_stack_minus_32, align 1
store i8 %28, i8* %27, align 8
%29 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 17
%30 = load i8, i8* @__anvill_stack_minus_31, align 1
store i8 %30, i8* %29, align 1
%31 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 18
%32 = load i8, i8* @__anvill_stack_minus_30, align 1
store i8 %32, i8* %31, align 2
%33 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 19
%34 = load i8, i8* @__anvill_stack_minus_29, align 1
store i8 %34, i8* %33, align 1
%35 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 20
%36 = load i8, i8* @__anvill_stack_minus_28, align 1
store i8 %36, i8* %35, align 4
%37 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 21
%38 = load i8, i8* @__anvill_stack_minus_27, align 1
store i8 %38, i8* %37, align 1
%39 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 22
%40 = load i8, i8* @__anvill_stack_minus_26, align 1
store i8 %40, i8* %39, align 2
%41 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 23
%42 = load i8, i8* @__anvill_stack_minus_25, align 1
store i8 %42, i8* %41, align 1
%43 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 24
%44 = load i8, i8* @__anvill_stack_minus_24, align 1
store i8 %44, i8* %43, align 8
%45 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 25
%46 = load i8, i8* @__anvill_stack_minus_23, align 1
store i8 %46, i8* %45, align 1
%47 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 26
%48 = load i8, i8* @__anvill_stack_minus_22, align 1
store i8 %48, i8* %47, align 2
%49 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 27
%50 = load i8, i8* @__anvill_stack_minus_21, align 1
store i8 %50, i8* %49, align 1
%51 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 28
%52 = load i8, i8* @__anvill_stack_minus_20, align 1
store i8 %52, i8* %51, align 4
%53 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 29
%54 = load i8, i8* @__anvill_stack_minus_19, align 1
store i8 %54, i8* %53, align 1
%55 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 30
%56 = load i8, i8* @__anvill_stack_minus_18, align 1
store i8 %56, i8* %55, align 2
%57 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 31
%58 = load i8, i8* @__anvill_stack_minus_17, align 1
store i8 %58, i8* %57, align 1
%59 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 32
%60 = load i8, i8* @__anvill_stack_minus_16, align 1
store i8 %60, i8* %59, align 8
%61 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 33
%62 = load i8, i8* @__anvill_stack_minus_15, align 1
store i8 %62, i8* %61, align 1
%63 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 34
%64 = load i8, i8* @__anvill_stack_minus_14, align 1
store i8 %64, i8* %63, align 2
%65 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 35
%66 = load i8, i8* @__anvill_stack_minus_13, align 1
store i8 %66, i8* %65, align 1
%67 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 36
%68 = getelementptr inbounds %enable_pin.frame_type_part0, %enable_pin.frame_type_part0* %2, i64 0, i32 0, i64 40
%69 = load i64, i64* @__anvill_reg_RBP, align 8
%70 = bitcast i8* %68 to i64*
store i64 %69, i64* %70, align 8
%71 = bitcast i8* %67 to i32*
store i32 %0, i32* %71, align 4
%72 = bitcast %enable_pin.frame_type_part0* %2 to i64*
store i64 4202647, i64* %72, align 8
%73 = bitcast i8* %27 to %struct.pin_type*
%74 = call %struct.pin_type* @sub_401eb0__A_S_X0_Eiiiii_Fi_S_M0_B_78(%struct.pin_type* nonnull %73, i32 %0)
%75 = bitcast i8* %59 to i32*
%76 = load i32, i32* %75, align 8
store i64 4202661, i64* %72, align 8
%77 = call i64 @sub_4010a0__Ailil_B_78(i32 %76, i64 0, i32 0)
%78 = load i32, i32* %75, align 8
store i64 4202684, i64* %72, align 8
%79 = call i64 @sub_401050__Ai_Sbll_B_78(i32 %78, i8* nonnull inttoptr (i64 4208356 to i8*), i64 1)
ret void
}
; Function Attrs: noinline
declare x86_64_sysvcc void @disable_pin(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @polarity_normal(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_period(i32, i8*, i8) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @get_period(i32, i8*) #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @read(i32, i8*, i64) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_duty(i32, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @get_duty(i32, i8*) #0
; Function Attrs: noinline
declare x86_64_sysvcc %struct.pin_type* @sub_401eb0__A_S_X0_Eiiiii_Fi_S_M0_B_78(%struct.pin_type*, i32) local_unnamed_addr #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @sub_4010a0__Ailil_B_78(i32, i64, i32) local_unnamed_addr #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @sub_401050__Ai_Sbll_B_78(i32, i8*, i64) local_unnamed_addr #0
attributes #0 = { noinline }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{!"clang version 12.0.0 (https://github.com/trailofbits/vcpkg.git 4592a93cc4ca82f1963dba08413c43639662d7ae)"}
Decompiled source:
struct struct_pin_type {
unsigned int field0;
unsigned int field1;
unsigned int field2;
unsigned int field3;
unsigned int field4;
};
struct struct_pin_type pinOL = {};
struct struct_pin_type pinIL = {};
struct struct_pin_type pinIR = {};
struct struct_pin_type pinOR = {};
unsigned long __anvill_reg_RBP;
unsigned char __anvill_sp;
unsigned char __anvill_ra;
unsigned char __anvill_pc;
unsigned char __anvill_stack_minus_48 = (unsigned char)0U;
unsigned char __anvill_stack_minus_47 = (unsigned char)0U;
unsigned char __anvill_stack_minus_46 = (unsigned char)0U;
unsigned char __anvill_stack_minus_45 = (unsigned char)0U;
unsigned char __anvill_stack_minus_44 = (unsigned char)0U;
unsigned char __anvill_stack_minus_43 = (unsigned char)0U;
unsigned char __anvill_stack_minus_42 = (unsigned char)0U;
unsigned char __anvill_stack_minus_41 = (unsigned char)0U;
unsigned char __anvill_stack_minus_40 = (unsigned char)0U;
unsigned char __anvill_stack_minus_39 = (unsigned char)0U;
unsigned char __anvill_stack_minus_38 = (unsigned char)0U;
unsigned char __anvill_stack_minus_37 = (unsigned char)0U;
unsigned char __anvill_stack_minus_36 = (unsigned char)0U;
unsigned char __anvill_stack_minus_35 = (unsigned char)0U;
unsigned char __anvill_stack_minus_34 = (unsigned char)0U;
unsigned char __anvill_stack_minus_33 = (unsigned char)0U;
unsigned char __anvill_stack_minus_32 = (unsigned char)0U;
unsigned char __anvill_stack_minus_31 = (unsigned char)0U;
unsigned char __anvill_stack_minus_30 = (unsigned char)0U;
unsigned char __anvill_stack_minus_29 = (unsigned char)0U;
unsigned char __anvill_stack_minus_28 = (unsigned char)0U;
unsigned char __anvill_stack_minus_27 = (unsigned char)0U;
unsigned char __anvill_stack_minus_26 = (unsigned char)0U;
unsigned char __anvill_stack_minus_25 = (unsigned char)0U;
unsigned char __anvill_stack_minus_24 = (unsigned char)0U;
unsigned char __anvill_stack_minus_23 = (unsigned char)0U;
unsigned char __anvill_stack_minus_22 = (unsigned char)0U;
unsigned char __anvill_stack_minus_21 = (unsigned char)0U;
unsigned char __anvill_stack_minus_20 = (unsigned char)0U;
unsigned char __anvill_stack_minus_19 = (unsigned char)0U;
unsigned char __anvill_stack_minus_18 = (unsigned char)0U;
unsigned char __anvill_stack_minus_17 = (unsigned char)0U;
unsigned char __anvill_stack_minus_16 = (unsigned char)0U;
unsigned char __anvill_stack_minus_15 = (unsigned char)0U;
unsigned char __anvill_stack_minus_14 = (unsigned char)0U;
unsigned char __anvill_stack_minus_13 = (unsigned char)0U;
unsigned char __anvill_stack_minus_12 = (unsigned char)0U;
unsigned char __anvill_stack_minus_11 = (unsigned char)0U;
unsigned char __anvill_stack_minus_10 = (unsigned char)0U;
unsigned char __anvill_stack_minus_9 = (unsigned char)0U;
unsigned char __anvill_stack_minus_8 = (unsigned char)0U;
unsigned char __anvill_stack_minus_7 = (unsigned char)0U;
unsigned char __anvill_stack_minus_6 = (unsigned char)0U;
unsigned char __anvill_stack_minus_5 = (unsigned char)0U;
unsigned char __anvill_stack_minus_4 = (unsigned char)0U;
unsigned char __anvill_stack_minus_3 = (unsigned char)0U;
unsigned char __anvill_stack_minus_2 = (unsigned char)0U;
unsigned char __anvill_stack_minus_1 = (unsigned char)0U;
unsigned char __anvill_stack_0 = (unsigned char)0U;
unsigned char __anvill_stack_plus_1 = (unsigned char)0U;
unsigned char __anvill_stack_plus_2 = (unsigned char)0U;
unsigned char __anvill_stack_plus_3 = (unsigned char)0U;
unsigned char __anvill_stack_plus_4 = (unsigned char)0U;
unsigned char __anvill_stack_plus_5 = (unsigned char)0U;
unsigned char __anvill_stack_plus_6 = (unsigned char)0U;
unsigned char __anvill_stack_plus_7 = (unsigned char)0U;
void initialize_pins();
unsigned int open(unsigned char *arg0, unsigned int arg1, ...);
struct struct_pin_type *get_pin(struct struct_pin_type *arg0, unsigned int arg1);
void set_power(unsigned int arg0, unsigned int arg1);
unsigned long lseek(unsigned int arg0, unsigned long arg1, unsigned int arg2);
unsigned long write(unsigned int arg0, unsigned char *arg1, unsigned long arg2);
void set_state(unsigned int arg0);
void enable_pin(unsigned int arg0);
void disable_pin(unsigned int arg0);
void polarity_normal(unsigned int arg0);
void set_period(unsigned int arg0, unsigned char *arg1, unsigned char arg2);
void get_period(unsigned int arg0, unsigned char *arg1);
unsigned long read(unsigned int arg0, unsigned char *arg1, unsigned long arg2);
void set_duty(unsigned int arg0, unsigned int arg1);
void get_duty(unsigned int arg0, unsigned char *arg1);
struct struct_pin_type *sub_401eb0__A_S_X0_Eiiiii_Fi_S_M0_B_78(struct struct_pin_type *arg0, unsigned int arg1);
unsigned long sub_4010a0__Ailil_B_78(unsigned int arg0, unsigned long arg1, unsigned int arg2);
unsigned long sub_401050__Ai_Sbll_B_78(unsigned int arg0, unsigned char *arg1, unsigned long arg2);
struct enable_pin_frame_type_part0 {
unsigned char field0[48];
};
void enable_pin(unsigned int arg0) {
}
--remove_phi_nodes and --lower_switch were used.
Another example, with simpler bitcode:
; ModuleID = '/tmp/challenge-3/program_c/src/gpio.ll'
source_filename = "gpio.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu-elf"
%struct.pin_type = type { i32, i32, i32, i32, i32 }
%sub_4021c0__Ai_Sbv_B_78.frame_type_part0 = type <{ [64 x i8] }>
@pinOL = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinIL = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinIR = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@pinOR = dso_local local_unnamed_addr global %struct.pin_type zeroinitializer, align 4
@__anvill_reg_RBP = external local_unnamed_addr global i64
@__anvill_sp = external global i8
@__anvill_ra = external global i8
@__anvill_pc = external global i8
@llvm.compiler.used = appending global [15 x i8*] [i8* bitcast (i64 (i32, i8*, i64)* @write to i8*), i8* bitcast (i64 (i32, i64, i32)* @lseek to i8*), i8* bitcast (i64 (i32, i8*, i64)* @read to i8*), i8* bitcast (i32 (i8*, i32, ...)* @open to i8*), i8* bitcast (void ()* @initialize_pins to i8*), i8* bitcast (%struct.pin_type* (%struct.pin_type*, i32)* @get_pin to i8*), i8* bitcast (void (i32, i32)* @set_power to i8*), i8* bitcast (void (i32)* @set_state to i8*), i8* bitcast (void (i32)* @enable_pin to i8*), i8* bitcast (void (i32)* @disable_pin to i8*), i8* bitcast (void (i32)* @polarity_normal to i8*), i8* bitcast (void (i32, i8*, i8)* @set_period to i8*), i8* bitcast (void (i32, i8*)* @get_period to i8*), i8* bitcast (void (i32, i32)* @set_duty to i8*), i8* bitcast (void (i32, i8*)* @get_duty to i8*)], section "llvm.metadata"
; Function Attrs: noinline
declare x86_64_sysvcc void @initialize_pins() #0
; Function Attrs: noinline
declare x86_64_sysvcc i32 @open(i8*, i32, ...) #0
; Function Attrs: noinline
declare x86_64_sysvcc %struct.pin_type* @get_pin(%struct.pin_type*, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_power(i32, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @lseek(i32, i64, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc i64 @write(i32, i8*, i64) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_state(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @enable_pin(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @disable_pin(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @polarity_normal(i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_period(i32, i8*, i8) #0
; Function Attrs: noinline
define x86_64_sysvcc void @get_period(i32 %0, i8* %1) #0 {
%3 = alloca %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, align 8
%4 = load i64, i64* @__anvill_reg_RBP, align 8
%5 = ptrtoint i8* %1 to i64
%6 = getelementptr inbounds %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3, i64 0, i32 0, i64 56
%7 = bitcast i8* %6 to i64*
store i64 %4, i64* %7, align 8
%8 = getelementptr inbounds %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3, i64 0, i32 0, i64 52
%9 = bitcast i8* %8 to i32*
store i32 %0, i32* %9, align 4
%10 = getelementptr inbounds %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3, i64 0, i32 0, i64 40
%11 = bitcast i8* %10 to i64*
store i64 %5, i64* %11, align 8
%12 = bitcast %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3 to i64*
store i64 4202971, i64* %12, align 8
%13 = getelementptr inbounds %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3, i64 0, i32 0, i64 16
%14 = bitcast i8* %13 to %struct.pin_type*
%15 = call %struct.pin_type* @get_pin(%struct.pin_type* nonnull %14, i32 %0)
%16 = getelementptr inbounds %sub_4021c0__Ai_Sbv_B_78.frame_type_part0, %sub_4021c0__Ai_Sbv_B_78.frame_type_part0* %3, i64 0, i32 0, i64 20
%17 = bitcast i8* %16 to i32*
%18 = load i32, i32* %17, align 4
store i64 4202985, i64* %12, align 8
%19 = call i64 @lseek(i32 %18, i64 0, i32 0)
%20 = load i32, i32* %17, align 4
%21 = bitcast i8* %10 to i8**
%22 = load i8*, i8** %21, align 8
store i64 4203002, i64* %12, align 8
%23 = call i64 @read(i32 %20, i8* %22, i64 100)
ret void
}
; Function Attrs: noinline
declare x86_64_sysvcc i64 @read(i32, i8*, i64) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @set_duty(i32, i32) #0
; Function Attrs: noinline
declare x86_64_sysvcc void @get_duty(i32, i8*) #0
attributes #0 = { noinline }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{!"clang version 12.0.0 (https://github.com/trailofbits/vcpkg.git 4592a93cc4ca82f1963dba08413c43639662d7ae)"}
I think the issue is this:
<badref> = addrspacecast i8 addrspace(256)* null to i8*
I don't know why its a <badref>, but address space casts are unsupported. We should be able to generate C code with __attribute__((address_space(N)).