fault

fault copied to clipboard

Ability To Load Results Back To Python

2

I've modified fault (https://github.com/David-Durst/fault/tree/aetherling_debugging) to work with Aetherling (https://github.com/David-Durst/aetherling/blob/master/aetherling/helpers/fault_helpers.py) so that I can write port values out to disk and then load them back after running the tests. I am...

David-Durst

Issue with setting nested arrays

5

```RecursionError: maximum recursion depth exceeded while calling a Python object Exception ignored in: '_pydevd_frame_eval.pydevd_frame_evaluator_darwin_36_64.get_bytecode_while_frame_eval' RecursionError: maximum recursion depth exceeded while calling a Python object RecursionError: maximum recursion depth exceeded while...

rsetaluri

This will record the signal value into a `.vcd` file.

leonardt

Right now, if you want to dynamically fetch a port or instance, you'll need to use `getattr(tester.circuit, key)`, instead it would be nice to do `tester.circuit[key]`

leonardt

Allow trace in verilator

3

in `verilator_utils.py`, function `verilator_cmd()` provides a way to construct verilator commands. I think it would be nice to have an option to enable trace, which will making debugging much easier.

Kuree

This test passes when using the coreir simulator (through the magma/pycoreir bindings). It fails when I try to run it using the python simulator, haven't investigated it further. ``` ~/repos/fault...

leonardt

Feature request: passing print statements through to verilator.

1

More debug features from python. One example is I would like to just stage a print statement. for example: ``` tester.print("SomeArbitraryString") tester.print(mysig1) ```

rdaly525

Feature Request: Access internal verilog values from fault

1

It would be very nice to do something along the lines of: ``` mymod_v = m.DefineFromVerilogFile("mymod.v")[0] tester = fault.Tester(mymod_v,mymod.clk) print(v_tester.peek(mymod_v.internal.)) ``` Most verilog simulators support something like this.

rdaly525

Where should we type check?

2

Imagine a circuit with input `I` of type `Bits(4)`. If we have a `fault.Tester` for this circuit, and we issue for example a `poke(circuit.I, 100)`, what should happen? I see...

rsetaluri

Improve test outputs

1

- [ ] Capture line info so we can print original source of expect failures and prints - [ ] Make expect failures uniform across targets - [ ] Verilator...

rsetaluri