SUB.L timing mismatch

[dirkwhoffmann]

Instruction: sub.l D0,D0

Test case: sub2

https://github.com/dirkwhoffmann/vAmigaTS/tree/master/CPU/SUB/sub2

Musashi (vAmiga):

A real Amiga 500+ 🥰:

Conclusion:

	{m68k_op_sub_32_er_d         , 0xf1f8, 0x9080, {  6,   6,   2,   2}},
	{m68k_op_sub_32_er_a         , 0xf1f8, 0x9088, {  6,   6,   2,   2}},
	{m68k_op_add_32_er_d         , 0xf1f8, 0xd080, {  6,   6,   2,   2}},
	{m68k_op_add_32_er_a         , 0xf1f8, 0xd088, {  6,   6,   2,   2}},

must be:

	{m68k_op_sub_32_er_d         , 0xf1f8, 0x9080, {  8,   6,   2,   2}},
	{m68k_op_sub_32_er_a         , 0xf1f8, 0x9088, {  8,   6,   2,   2}},
	{m68k_op_add_32_er_d         , 0xf1f8, 0xd080, {  8,   6,   2,   2}},
	{m68k_op_add_32_er_a         , 0xf1f8, 0xd088, {  8,   6,   2,   2}},

I cannot say anything reliable about 68010 timing though.