Emil Fresk

Results 273 comments of Emil Fresk

Sounds useful, could you make a PR for the feature?

Hi, if you can port the upstream methods in to `heapless` I think this should be fine.

Hi, I think `heapless` should have an `async` module in where we can look at adding `async` specific data structures. Maybe @Dirbaio also has some from `embassy` that would make...

This won't be merged, the compile time goes outside the max limits of the CI xD

Thanks for finding, but the current system is correct! :) For RISCV support we are officially adding it to RTIC 2. If you feel like it you're welcome to help...

I think we can remove it. It's only a rename is cortex-m peripherals, and we can use it's full name instead.

This would be good, just the complexity of "where does the money go?" needs to be resolved.

Hi, The only way to have non-`Send` is in a resource in an priority = 0 task. If you want to store something (where the inner value is `Send`), `Arbiter`...

Hi, The `rtic_sync::arbiter::Arbiter` should work from multiple tasks, it is `Sync`. So either share it via a `static` or an immutable resource would be my recommendation. `Arc` is not needed...

Hi, thanks for the report! Do you have an example we can use to reproduce this? I checked tests and this assert is quite well tested so I'm not sure...