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Published 20 hours ago • verified publisher icon korginc

slow down the clock of GPIO pins for SPI

Open boochow opened this issue 4 years ago • 1 comments

This PR fixes unstable SPI communication. GPIO_SPEED_FREQ_HIGH is for range 10 MHz to 50 MHz communication and is too fast for the communication between NTS1 main board and control panel (its speed is 1MHz). I experienced SPI communication trouble when I connected a Nucleo-F030 board to NTS1. Slowing down the GPIO pin clock made the communication stable.

boochow avatar Sep 06 '20 10:09 boochow

I can confirm this PR improves stability and reliability using the custom panel board. I have tested this with code compiled using the MBED OS platform.

jw-smaal avatar Jan 25 '21 15:01 jw-smaal