Petr Kobalicek
Petr Kobalicek
In case of decode, you should always decode to an original instruction and consider all other aliases as just aliases. The encoder would support the alias (or not, depending on...
Can you describe what is ambiguous in `movss` / `movsd` case? The instructions really do what is described. `movss|movsd` from memory clears the rest of the register, `movss|movsd` between registers...
That is something that I have been thinking about too. However, I'm not that proficient regarding AArch64 so I don't know at the moment how to measure the cycles consumed...
I'm wondering, what is a use-case for this?
I think this should be considered a bug - maybe we should run some code before testing anything AVX-512 to heat it up?
Thanks! No arguments are necessary, but `--output=somefile.json` is a handy option. BTW I have never tested this with AVX-512, I have no idea whether it would all work flawlessly, so...
Yeah, I think it's the opposite - `bt reg, reg` is read-only for registers, it only modifies the carry flag, so it's hard to make the asm that has dependencies...
Yeah I'm also getting 0.2 reciprocal throughput on some instructions on Ryzen, but apparently Ryzen is capable of executing 5 instructions per cycle if they are in uop cache. However,...
I have opened #7 to track the latency issue
Hmm, I don't know how to fix this though. It seems the readings are incorrect in that case. It uses `rdtscp` when available, I followed Intel manual here.