hdlparse
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kevinpt
Simple parser for extracting VHDL documentation
Hi! I came across symbolator and hdlparse when I was looking to automate some of my documentation flow. Is it possible that we can add Bluespec[1] support for hdlparse/symbolator ?...
`use_2to3` has been removed from setuptools after version 58. No longer builds nor gets installed via pip or otherwise. Breaks any projects that depend on it. Users downgrading setuptools or...
Error in parsing the last Output in a module ``` module dut( input clk,rst, output reg [2:0]S1, output reg [2:0]S2, output reg [2:0]S3, output reg [2:0]S4 ); ``` ### Parsing...
It's a shame that such a great idea for a simple hdl parser which isn't tied into a larger bloatier package of tools and keeps within the simple scripting framework...
The following code snippet in the documentation uses `extract_objects_from_source` when it should use `extract_objects` ```python import hdlparse.verilog_parser as vlog vlog_ex = vlog.VerilogExtractor() vlog_mods = vlog_ex.extract_objects_from_source('example.v') for m in vlog_mods: print('Module...
I tried hdlparse for parsing a small entity. The entity is known to be correct (used in many projects and working fine for synthesis and simulation). However, hdlparse just returns...
This PR adds entity parsing, at least basically. Should help/fix #13 and #6 ?
So I saw in #3 that you are looking at trying to keep hdlparse simple and targeted at just being used for documentation generation. > In the IEEE Verilog 1364-2001...
