Jessica Clarke
Jessica Clarke
If the void worm has attribute modifiers for its max health, we use the modified value to set the base health value, and so if the attribute gets reapplied by...
The prefetch and zeroing instructions are very clear about how they interact with the accessed and dirty bits, but there is no similar discussion for the management instructions, and the...
Since compatibility mode is a property of the root domain only, either the entire system is using a legacy PLIC or the entire system is using a series of APLIC...
Currently the base spec says: > Memory accesses by I/O masters can be coherent or non-coherent with respect to all hart-related caches. However, nothing is said about what software should...
Currently the spec says: > * Platforms are required to provide an at least 10ns resolution 64-bit counter with strictly monotonic updates. > > * The hardware clock that drives...
Other Unix operating systems have been ported to RISC-V, not just Linux. FreeBSD was the first, then Linux, and now OpenBSD and Haiku are in the process of being ported....
RVC HINTs are disassembled with names like `c.nop.hint.` rather than the mnemonics used by actual (dis)assemblers (which are generally just whatever the non-HINT version would be in the case of...
Currently we have both sys_enable_fdext and sys_enable_zfinx, and assert the nonsense fourth combination of F+Zfinx isn't the case in: https://github.com/riscv/sail-riscv/blob/085cfcd3fc3be92aaa86b4caabf9d248eae5f83e/model/riscv_sys_control.sail#L562-L563 It might be cleaner to instead have this as a...
Smstateen (https://github.com/riscv/riscv-state-enable/releases/download/v1.0.0/Smstateen.pdf) was ratified in November and defines [mhs]stateenN registers to gate access to architectural state added by extensions. This ensures new extensions don't add covert channels that old software...