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FPGA core for SHA256d mining targeting Lattice iCE40 devices.

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* [ ] PCF * [ ] READY neighbour signals * [ ] ...

enhancement

Implement formal verification techniques on modules.

enhancement

And add badge to README! https://travis-ci.org/

enhancement
testing

Convert input/output data storage from registers to block RAM. We're currently using about 700 bits worth of shift registers... Maybe we can squeeze some more compute power out of certain...

enhancement

Branch and add support for ECP5-85.