James Cherry
James Cherry
@dineshannayya is correct. There is a better strategy that fixes the hold violation without affecting the setup violation. Setup repair splits non-violating loads from violating loads and hold repair could...
fixed in openroad 79313e90d
Short of providing a testcase can you at least describe what nets the assign connects? Input? Outputs? Hierarchical module ports? The probability of fixing the problem you have is much...
I tried to reproduce this with the attached verilog/spef but it worked as expected. Maybe you can modify the attached test case to reproduce your issue. [sta113.zip](https://github.com/The-OpenROAD-Project/OpenSTA/files/9686972/sta113.zip)
It would be possible for cts to sort this out by looking at the liberty instead of the LEF, but it seems to me that the LEF VNB/VPB pins should...
Just to be clear, the LEF for the clock buffers (and any other buffer for that matter) has 3 signal input pins that are only distinguishable by their name. cts...
It is most certainly not the same issue.
Please package a complete testcase with all of the data to run it. The only thing in this tarfile is a def file and a command file and references to...
It is fine to reference the PDK in or1:/platforms etc but I have to be able to run it in openroad (not shell, not openlane) with all of the design...
There is no GF180.git repo in either of the 2 places I know to find it: or1:/platforms and /home/zf4_projects/OpenROAD-guest/platforms. So where is it hiding?