Jean-François Nguyen

lib.fifo: fix reset handling of asynchronous FIFOs.

1

Asynchronous FIFOs do not properly handle a write domain reset (i.e. `w_level` is not reset to 0). This PR attempts to fix their behaviour.

AttributeError when requesting an output pin with a clock constraint

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Repro: ```python3 from nmigen import * from nmigen_boards.arty_a7 import ArtyA7_35Platform # Resource("eth_clk50", 0, Pins("G18", dir="o"), # Clock(50e6), Attrs(IOSTANDARD="LVCMOS33")), platform = ArtyA7_35Platform() eth_clk50 = platform.request("eth_clk50", 0) m = Module() m.d.comb +=...

Document how to use connectors from platform definitions

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This question comes up regularly on the #nmigen IRC channel.

Support for generated clock constraints

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We currently do not have a way to define an explicit relationship between a clock and another user-generated clock, derived from the former. The relationship would be expressed in terms...

- RFC PR: https://github.com/amaranth-lang/rfcs/pull/30 - Amaranth PR: https://github.com/amaranth-lang/amaranth/pull/978 - [x] Implementation - [x] Reference documentation - [x] Guide-level documentation - [x] Expanding the documentation of `lib.wiring` - [x] Changelog entry

Add RFC for an UART peripheral.

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[Rendered](https://github.com/jfng/amaranth-rfcs/blob/soc-uart-peripheral/text/0060-soc-uart-peripheral.md).

This PR migrates existing docstrings to numpydoc and renders them with `pdm run document` alongside upstream documentation. Docstring content is (mostly) left untouched and will be the focus of the...

Implement RFC 60: UART peripheral.

1

Remains in draft status until: - [ ] amaranth-lang/rfcs#60 is merged. - [x] amaranth-lang/amaranth#1244 is closed.

- RFC PR: https://github.com/amaranth-lang/rfcs/pull/49 - Amaranth SoC PR: - [x] Implementation: amaranth-lang/amaranth-soc#76 - [ ] Reference documentation - [ ] Guide-level documentation