[ICE] "cannot remove assignment" of bool value

[dsprenkels]

The following code results in an internal compiler error:

export
fn ssa_ice_20220828(reg u64 n)
    -> reg u64 {
    reg u64 ret;
    reg bool cond done fail;

    fail = false;
    done = false;
    while {
        cond = done || fail;
    } (!cond) {
        done = true;
    }

    ret = #set0_64();
    return ret;
}

The error in question that I get is:

[dsprenkels@shaggydog:~/jasmin-dilithium/src]└3 verify-ref(+39/-27)* 1 ± jasminc -pasm ssa_ice_20220828.jazz -ppropagate 
"ssa_ice_20220828.jazz", line 15 (4-21):
warning: introduce 5 _ lvalues
/* -------------------------------------------------------------------- */
/* After propagate inline variables */


export
fn ssa_ice_20220828 (reg u64 n.133) -> (reg u64) {
  reg bool fail.144;
  reg bool cond.146;
  reg bool done.147;
  reg u64 ret.148;
  
  fail.144 = false; /* bool */
  done.147 = false; /* bool */
  while {
    cond.146 = (done.147 || fail.144); /* bool */
  } (! cond.146) {
    done.147 = true; /* bool */
  }
  (_ /* bool */, _ /* bool */, _ /* bool */, _ /* bool */, _ /* bool */,
   ret.148) = #set0_64();
  return (ret.148);
}


"", line -1 (-1):
internal compilation error in function ssa_ice_20220828:
  SSA: cannot remove assignment done.161 = done.163
Please report at https://github.com/jasmin-lang/jasmin/issues

Apparently, it seems to have to do with the assignment of done inside of the while block, because when I remove that I get another very non-intelligible error:

---

Compiling the following code:

export
fn ssa_ice_20220828(reg u64 n)
    -> reg u64 {
    reg u64 ret;
    reg bool cond done fail;

    fail = false;
    done = false;
    while {
        cond = done || fail;
    } (!cond) {
        // done = true; // STATEMENT DISABLED
    }

    ret = #set0_64();
    return ret;
}

Results in this error:

"ssa_ice_20220828.jazz", line 10 (8-28):
compilation error in function ssa_ice_20220828:
linearization: assign not a word

I am not sure why the error occurs on a different line. Moveover, I do not see what would be wrong with the code where the done assignment is commented out.

[dsprenkels]

Might be related to https://github.com/jasmin-lang/jasmin/issues/12?

[vbgl]

Do you think your program can be compiled? What assembly code do you expect to be generated?

[dsprenkels]

I was looking to generate something like this:

.intel

ssa_ice_20220828:
    xor dil, dil    ; fail
    xor sil, sil    ; done
.1:
    mov r8b, sil    ; cond = done
    or r8b, dil     ; cond ||= fail;
    test r8b, r8b   ; !cond
    jz .3
.2:
    mov sil, 1      ; done = true
    jmp .1
.3:
    xor rax, rax
    ret

[dsprenkels]

@vbgl I think I get what you mean. bool values seem to be lowered specifically to cpu flags, and working with them seems to get finicky pretty quickly. If I change the code a little bit:

export
fn ssa_ice_20220828(reg u64 n)
    -> reg u64 {
    reg u64 ret;
    reg u8 done fail cond;

    fail = 0;
    done = 0;
    while {
        cond = done | fail;
    } (cond == 0) {
        done = 1;
    }

    ret = #set0_64();
    return ret;
}

we seem to kind-of get the code that I was looking for:

        .intel_syntax noprefix
        .text
        .p2align        5
        .globl  _ssa_ice_20220828
        .globl  ssa_ice_20220828
_ssa_ice_20220828:
ssa_ice_20220828:
        xor     al, al
        xor     cl, cl
        jmp     Lssa_ice_20220828$1
Lssa_ice_20220828$2:
        mov     cl, 1
Lssa_ice_20220828$1:
        or      cl, al
        cmp     cl, 0
        je      Lssa_ice_20220828$2
        xor     rax, rax
        ret

[dsprenkels]

Okay I would conclude that the code I started with is wrong in the first place :sweat_smile:. So I think we just desire a better error message here.

[vbgl]

Yes. If you want 8-bit registers, you should declare reg u8 variables. bool are one bit.

[eponier]

Fixed by #313.