SPI1 SCK pin (PB3) occupied by TRACESWO

[lorenz]

When using SPI1 the PB3 pin which is mapped to SCK doesn't work by default because in the default configuration of the MAPR register that pin is mapped to TRACESWO. To be able to use it one needs to set the SWJ_CFG register to 010 which disables JTAG debugging and the TRACESWO pin and only leaves the normal SWDIO/SWCLK enabled. Something like afio.mapr.mapr().modify(|_, w| unsafe { w.swj_cfg().bits(0b010) }); does the job.

The question is how do we handle things like this this in the HAL? The SPI1 initialization function has mutable access to the correct register, but setting that register is not entirely without consequences, it disables JTAG and also disables the NJTRST pin. The best idea is probably to make the user set the debug mode himself and let the build fail if the selected debug mode occupies pins that are used in the program.