Handwritten-Digit-Recognition-Painter
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Published
20 hours ago •
j3soon
j3soon
A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog.
Handwritten Digit Recognition Painter
A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog and a little VHDL.
Report & Explanation
See report.pdf for further information.
Source
See src in Vivado.
Release Binaries
- release/top.bit is for normal use on Basys 3 Artix-7 FPGA.
- release/top.bin is for using SPI Flash memory to enable plug and play.
j3soon