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Access bits of a `Logic` by `Logic` index

Open mkorbel1 opened this issue 1 year ago • 2 comments

Motivation

Sometimes it's desirable to access a bit of a Logic signal by another Logic. This is achievable with >> n and & Const(1), but it would be nice to just use [n] directly to generate that code for ease of use and readability.

Desired solution

Modify the overloaded operator[] on Logic so that it can accept either an int or another Logic, and appropriately generates hardware if necessary (if it's a Logic).

mkorbel1 avatar Aug 19 '22 17:08 mkorbel1

Hi, can I take this one next?

akshay-wankhede avatar Aug 29 '22 18:08 akshay-wankhede

It might be a good idea to make a new custom module so that the generated output SystemVerilog has [] instead of << &1

mkorbel1 avatar Aug 30 '22 23:08 mkorbel1