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Add named constants or enums
Motivation
There are a variety of ways to create Const
s to represent enumerable types in hardware with ROHD, and currently everyone comes up with their own way that's convenient for them. Creating a standardized way of doing it would improve consistency, encourage best practices, and provide an opportunity for helpful utilities and automation.
- Encoding features could be added.
- Generated outputs (e.g. SV) could contain named constants instead of plain numbers.
Desired solution
Some type other than Const
that can be used to represent named constants or enums in hardware.
- Should support options for a variety of encodings (e.g. one-hot, gray, sequential, etc.)
- Should enable generated outputs to use names for constants instead of just directly exporting the numbers.
- e.g. SystemVerilog could use
localparam
s with names for constants in FSM abstractions
- e.g. SystemVerilog could use
Alternatives considered
Could just leave users to create their own enums and live with constant numbers in generated code (i.e. no change).
Additional details
This was discussed during FSM abstraction discussions in the ROHD Forum on July 27, 2022. Thanks Eric and Omer for the discussion and ideas!